Espressif Systems /ESP32-S3 /ASSIST_DEBUG /CORE_0_INTR_RAW

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CORE_0_INTR_RAW

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CORE_0_AREA_DRAM0_0_RD_RAW)CORE_0_AREA_DRAM0_0_RD_RAW 0 (CORE_0_AREA_DRAM0_0_WR_RAW)CORE_0_AREA_DRAM0_0_WR_RAW 0 (CORE_0_AREA_DRAM0_1_RD_RAW)CORE_0_AREA_DRAM0_1_RD_RAW 0 (CORE_0_AREA_DRAM0_1_WR_RAW)CORE_0_AREA_DRAM0_1_WR_RAW 0 (CORE_0_AREA_PIF_0_RD_RAW)CORE_0_AREA_PIF_0_RD_RAW 0 (CORE_0_AREA_PIF_0_WR_RAW)CORE_0_AREA_PIF_0_WR_RAW 0 (CORE_0_AREA_PIF_1_RD_RAW)CORE_0_AREA_PIF_1_RD_RAW 0 (CORE_0_AREA_PIF_1_WR_RAW)CORE_0_AREA_PIF_1_WR_RAW 0 (CORE_0_SP_SPILL_MIN_RAW)CORE_0_SP_SPILL_MIN_RAW 0 (CORE_0_SP_SPILL_MAX_RAW)CORE_0_SP_SPILL_MAX_RAW 0 (CORE_0_IRAM0_EXCEPTION_MONITOR_RAW)CORE_0_IRAM0_EXCEPTION_MONITOR_RAW 0 (CORE_0_DRAM0_EXCEPTION_MONITOR_RAW)CORE_0_DRAM0_EXCEPTION_MONITOR_RAW

Description

core0 monitor interrupt status register

Fields

CORE_0_AREA_DRAM0_0_RD_RAW

Core0 dram0 area0 read monitor interrupt status

CORE_0_AREA_DRAM0_0_WR_RAW

Core0 dram0 area0 write monitor interrupt status

CORE_0_AREA_DRAM0_1_RD_RAW

Core0 dram0 area1 read monitor interrupt status

CORE_0_AREA_DRAM0_1_WR_RAW

Core0 dram0 area1 write monitor interrupt status

CORE_0_AREA_PIF_0_RD_RAW

Core0 PIF area0 read monitor interrupt status

CORE_0_AREA_PIF_0_WR_RAW

Core0 PIF area0 write monitor interrupt status

CORE_0_AREA_PIF_1_RD_RAW

Core0 PIF area1 read monitor interrupt status

CORE_0_AREA_PIF_1_WR_RAW

Core0 PIF area1 write monitor interrupt status

CORE_0_SP_SPILL_MIN_RAW

Core0 stackpoint overflow monitor interrupt status

CORE_0_SP_SPILL_MAX_RAW

Core0 stackpoint underflow monitor interrupt status

CORE_0_IRAM0_EXCEPTION_MONITOR_RAW

IBUS busy monitor interrupt status

CORE_0_DRAM0_EXCEPTION_MONITOR_RAW

DBUS busy monitor initerrupt status

Links

() ()